This invention relates to a display interface system and more particularly to the use of an array of addressable segment latches in a display interface to reduce the number of instructions necessary to operate a calculator in the display mode.
Widely used displays include light emitting diode, liquid crystal, gas discharge, and electrochromatic types. Widely used techniques of display interface include digit scan, segment scan, and common scan, the type of display interface utilized being in part dependent on the type of display selected. Both the digit scan and segment display interface system utilize a display matrix comprised of multiple segment common lines intersecting with multiple digit common lines. For a segment of a particular digit to be enabled, the respective segment and digit common lines for that segment and digit must be enabled. In a digit scan display interface, the character is decoded into the segment outputs representing the desired display digit, and a single digit line is enabled so as to display the decoded segment data. The next character of display is decoded into segment information and the next consecutive digit line is scanned, etc., this process is cyclically repeated such that the on duty cycle of each digit equals the reciprocal of the number of digit lines scanned. In a segment scan display interface, each segment line is consecutively enabled in a cyclic fashion, with the display character decode selectively enabling the proper subset of digit lines. The ON duty cycle of each segment is the reciprocal of the number of segment lines scanned per cycle. The digit scan and segment scan techniques have found widespread applications in light emitting diode displays.
A recent innovation utilized in conjunction with liquid crystal displays is the common scan display interface. In a typical common scan system, there are three common scan lines which form a matrix with segment lines and which are cyclically enabled. The number of segment lines in the matrix is equal to one third of the total number of segments in the display. The ON duty cycle of each segment is the reciprocal of the number of common scan lines, that is, one-third (1/3). Alternately, a configuration of two and four common scan lines has also been utilized. During each common time interval, a complete digit scan cycle is required to provide the display segment information. During each digit scan interval within the digit scan cycle, the segment information is further decoded corresponding to the associated common scan line, and the decoded common segment data is stored in a latch array for application to the segments during that common scan time interval. Since each common scan line is associated with fixed segments of each digit, the output of each latch of the latch array may be connected to three segments of each digit position, each of the three segments corresponding to a different one of the three common scan lines. Since a single display cycle requires six common time intervals in a liquid crystal display, three positive voltage and three negative voltage common time intervals, the common scan display interface for an eight digit display required 48 character inputs per display cycle, and must perform 48 two-level decodes or 96 decode operations per display cycle, and must store the decoded segment common information in the latch array 48 times per display cycle. Thus, in an eight digit display calculator, the processor must access its read/write random access memory (RAM) for each respective display digit code, and output this code to the common scan display interface 48 times each display cycle. Therefore, even in a display only mode, the processor must continue to operate at a clock frequency adequate to provide display output data to the display interface. Furthermore, since in CMOS logic the power is proportional to the frequency, the operating frequency of the calculator processor during the display mode directly impacts battery life.